Embodiments of the present invention relate to a semiconductor device, and more particularly, to technology capable of adjusting an output duration of data when performing a rank-to-rank switching on chips that are stacked and interconnected through a through silicon via (TSV).
The demand for highly integrated and high-capacity semiconductor memories is rapidly increasing as high-performance electronic appliances become increasingly smaller and as demand for mobile products increases. There are a variety of methods for increasing the storage capacity of semiconductor memories.
Among these methods, one method is to increase the degree of integration of semiconductor chips. Another method is to assemble a plurality of semiconductor chips into a single semiconductor package.
Generally, increasing the degree of integration of semiconductor chips requires much more effort, cost, and time. On the other hand, in assembling semiconductor chips into a single semiconductor package, it is possible to provide an increased storage capacity of semiconductor memories by changing the packaging method.
In addition, methods of assembling the semiconductor chips are more advantageous than methods of increasing the degree of integration of the semiconductor chips in terms of costs, effort, and time consumed in research and development. As a result, manufacturers of semiconductor memories have made efforts to increase storage capacity of semiconductor memory devices through multi-chip packaging in which multiple semiconductor chips are assembled to a single semiconductor package.
For example, in order to assemble a plurality of semiconductor chips into a single semiconductor package, there is a method for horizontally assembling the semiconductor chips and there is a method for vertically assembling the semiconductor chips into the single semiconductor package. However, due to the miniaturization of electronic appliances, most manufacturers prefer to use Stack Type Multi Chip Packaging, in which multiple semiconductor chips are vertically stacked and packaged. A representative example of such stack packages is implemented using a Through Silicon Via (TSV).
In a plurality of semiconductor chips that are stacked using TSVs, data (DQ) pads are interconnected through the TSVs so that the DQ pads may output data through a rank control. In this case, since data collision or floating between pieces of output data (DQ) may occur, a data training process needs to be carried out. Data collision may occur when at least two pieces of output data overlap, and data floating may occur when there is discontinuity between pieces of output data.
However, when adjusting the input/output (I/O) timing of data or performing rank-to-rank switching using the data training process during a power-up operation, command bubbling (e.g., data collision or data floating) may occur. If command bubbling occurs, it is difficult to control data, and a throughput of a stack package may be deteriorated.
FIG. 1 is a conceptual diagram illustrating data collision occurring in a TSV-based package in which a plurality of memory chips is stacked. As shown in FIG. 1, if data read from a first memory chip (Memory 1) overlaps with data read from a second memory chip (Memory 0) in the package, data collision occurs between the two pieces of data when they are output through a single TSV.
FIG. 2 is a conceptual diagram illustrating data floating occurring in a TSV-based package. In the package, if there is discontinuity between data read from the first memory chip (Memory 1) and data read from the second memory chip (Memory 0), data floating occurs between the two pieces of data when they are output through a single TSV.